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https://github.com/mbirth/wipy-ussd1306.git
synced 2024-11-09 12:36:46 +00:00
Added functions for low-level settings.
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@ -69,11 +69,14 @@ class SSD1306:
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self.i2c = i2c
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self.i2c = i2c
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self.pwr = pwr
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self.pwr = pwr
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self.osc_freq = 8
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self.clock_div = 1
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self.power_on() # enable power to the display
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self.power_on() # enable power to the display
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self.set_power(self.POWER_DOWN) # set display to sleep mode
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self.set_power(self.POWER_DOWN) # set display to sleep mode
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self.command([0xd5, 0x80]) # set clock divider
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self.set_osc_freq(8, False) # set oscillator freq., but don't send to LCD yet
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self.command([0xa8, 0x3f]) # set multiplex to 0x3f (for 32px: 0x1f)
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self.set_clock_div(1) # set clock div and send osc_freq+clock_div to LCD
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self.set_mux_ratio(self.height) # set multiplex ratio to 64 (default), for 32px: 32
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self.command([0xd3, 0x00]) # set disp offset to 0
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self.command([0xd3, 0x00]) # set disp offset to 0
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self.command(0x40|0x00) # set start line to 0
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self.command(0x40|0x00) # set start line to 0
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self.command([0x8d, 0x14]) # chargepump on (ext. VCC - off: 0x10)
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self.command([0x8d, 0x14]) # chargepump on (ext. VCC - off: 0x10)
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@ -87,12 +90,36 @@ class SSD1306:
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self.set_display(DISPLAY_NORMAL) # enables and sets disp to show RAM contents, not inversed
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self.set_display(DISPLAY_NORMAL) # enables and sets disp to show RAM contents, not inversed
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self.clear()
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self.clear()
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def set_power(self, power, set=True):
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def set_power(self, power):
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""" Sets the power mode of the LCD controller """
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""" Sets the power mode of the LCD controller """
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assert power in [self.POWER_UP, self.POWER_DOWN], "Power must be POWER_UP or POWER_DOWN."
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assert power in [self.POWER_UP, self.POWER_DOWN], "Power must be POWER_UP or POWER_DOWN."
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self.power = power
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self.power = power
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self.command(power)
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self.command(power)
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def _set_oscfreqclockdiv(self):
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""" Sets the oscillator frequency and clock divider value """
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value = (self.osc_freq << 4) | (self.clock_div-1)
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self.command([0xd5, value])
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def set_osc_freq(self, osc_freq, set=True):
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""" Stores and sets the oscillator frequency """
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assert 0 <= osc_freq < 16, "Oscillator frequency must be between 0 and 15."
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self.osc_freq = osc_freq
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if set:
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self._set_oscfreqclockdiv()
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def set_clock_div(self, clock_div, set=True):
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""" Stores and sets clock divider """
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assert 0 < clock_div <= 16, "Clock divider must be between 1 and 16."
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self.clock_div = clock_div
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if set:
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self._set_oscfreqclockdiv()
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def set_mux_ratio(self, mux_ratio):
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""" Sets the multiplex ratio. """
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assert 16 <= mux_ratio <= 64, "Mux ratio must be between 16 and 64."
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self.command([0xa8, (mux_ratio-1)])
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def set_adressing(self, addr):
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def set_adressing(self, addr):
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""" Sets the adressing mode """
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""" Sets the adressing mode """
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assert addr in [self.ADDRESSING_HORIZ, self.ADDRESSING_VERT, self.ADDRESSING_PAGE], "Addressing must be ADDRESSING_HORIZ, ADDRESSING_VERT or ADDRESSING_PAGE."
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assert addr in [self.ADDRESSING_HORIZ, self.ADDRESSING_VERT, self.ADDRESSING_PAGE], "Addressing must be ADDRESSING_HORIZ, ADDRESSING_VERT or ADDRESSING_PAGE."
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